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CXMT, a Chinese memory chip manufacturer, announced significant advancements in its proprietary transistor design at an industrial event in Shanghai over the weekend. The company's president, Cao Kanyu, revealed that CXMT plans to release a new server-memory product based on their innovative "4F square" cell structure by the end of 2026. This design allows for greater storage density compared to the standard 6F square-cell structure used in mainstream DRAM today.
Written locally by qwen2.5:14b on 2026-10-12,
using this article's own text rather than the other coverage of the
same event (that is the story summary below).
Story summary
At an industrial event in Shanghai over the weekend, CXMT, a Chinese memory chip giant, announced significant progress on a new chip design that could rival technologies developed by Samsung and SK Hynix. CXMT’s president Cao Kanyu revealed plans to introduce a server-memory product using their proprietary “4F square” transistor design by the end of 2026, which promises higher storage density and improved efficiency compared to existing mainstream commercial DRAM that uses a 6F square-cell structure. This breakthrough could potentially increase chip storage capacity while reducing production costs, giving CXMT an edge in the competitive semiconductor market.
Written for “Chinese Chip Progress” on 2026-10-12,
grounded in this article and the 0 other(s) covering the same event.
China’s CXMT unveils ‘key progress’ on chip structure pursued by Samsung, SK Hynix
Memory chip giant says its proprietary transistor design could increase storage density and improve efficiency
CXMT planned to roll out a new server-memory product based on the structure by the end of 2026, president Cao Kanyu said at an industrial event in Shanghai over the weekend, according to a company statement.
uncertain
Kanyu → unveil → statement
At the centre of the development is the “4F square” design, in which each memory cell occupies an area of four square F, with F representing the minimum line width of a semiconductor.
asserted
F → occupy → semiconductor
The structure enables higher storage density by fitting more cells onto a single chip.
asserted
structure → enable → chip
For now, mainstream commercial dynamic random-access memory (DRAM) uses a 6F square-cell structure.
asserted
memory → use → structure
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